Wuxi Cluster from Moore Threads with 2112 GPUs Reaches 92.9% Utilization After Commercial Operation Begins

The first computing cluster built on SuperPoD with 1024 Ascend 950DT cards from Huawei was activated in Wuhan. The launch took place on October 28 at the Huawei Artificial Intelligence conference for Hubei Province, which was part of the Huawei 2026 China roadshow.

The investment for this cluster was provided by the Hubei Provincial Science and Technology Investment Group, which is the provincial state investor. According to this group, the project implementation took only one month from the start of work to commissioning, which is a relatively short period for a system of this scale.

The deployment is a single liquid-cooled SuperPoD. One node is equipped with 1024 Ascend NPU accelerator cards. Both compute and interconnect cabinets are fully equipped with liquid cooling systems. The system is capable of providing 1 EFLOPS performance in FP8 format and has 256 TB of globally unified memory. Inter-card bandwidth reaches terabytes per second, and end-to-end latency is in the microseconds.

The design architecture is based on UnifiedBus, Huawei's internal connection architecture for SuperPoD. This technology allows each card in the cluster to directly access other cards, enabling the 1024 NPUs to function more like one large accelerator rather than many individual servers connected via a standard network. Huawei positions this setup for training trillion-parameter models and for running AI agent inference.

The main advantage of the SuperPoD approach is direct access. When training large models, a significant amount of time is spent moving data between chips. Maintaining unified memory across the pod and within its interconnect architecture reduces the volume of traffic that must pass through slower channels.

The cluster is designed to meet local needs. It aims to provide model developers and companies in Hubei with an accessible source of computing power for training large models, as well as for creating, configuring, and operating industry AI agents. Local sources note that this fills a gap in high-performance computing supply in the province.

The launch in Wuhan also marks the early practical implementation of the Ascend 950 generation. Earlier this year, Huawei demonstrated a physical SuperPoD based on Ascend 950 and reported that over 750 units of the previous generation Ascend 384 SuperPoD had already been commercially deployed. The 950DT cluster in Wuhan demonstrates the transition of the new SuperPoD design from demonstration equipment to regional AI computing centers.

Huawei did not disclose data on the cluster's power consumption or detailed utilization metrics; the numerical values mentioned above were stated at the launch event.

Moore Threads has made the Megatron-MUSA-Titan project publicly available, presenting an infrastructure for training large models that it developed for use on its own graphics processors. This project is designed to work with trillion-parameter 'mixture-of-experts' (MoE) models on clusters consisting of over 10,000 Moore Threads GPUs, covering both pre-training and reinforcement learning.

The project code is available on GitHub. The company claims that this system was continuously used for pre-training a trillion-parameter MoE on 10,000-GPU clusters, where long training sessions ensured high FLOPs utilization and process stability.

The repository includes an example configuration for a Kimi-K2 style MoE model with 1 trillion parameters. A central design principle was maintaining closeness to existing solutions. Megatron-MUSA-Titan is built upon NVIDIA's Megatron-LM framework. Through integration of PyTorch via torch_musa and compatibility of MUSA C with CUDA C, developers with the MUSA environment can clone official Megatron-LM, slime, and miles repositories and run training on Moore Threads GPUs without modifying the source code.

The project indicates that general algorithms and bug fixes should be directed to upstream projects, while Moore Threads focuses on two types of changes: large-scale optimizations adapted for Moore Threads hardware and clusters, and workarounds for specific MUSA issues.

Pre-training features include block training in FP8 format, which relies on Moore Threads' MT-TransformerEngine. MoE token dispatching and merging are accelerated by DeepEP, running on the company's Async Copy Engine, which also allows expert communication parallel to computations. Other options include activation offloading using virtual pipeline parallelism and scheduling one forward and one backward pass, as well as pipeline parallel communication combined with computation, thanks to Mooncake RDMA.

A distributed tracing analysis tool reads PyTorch traces from each GPU to detect bottlenecks such as pipeline bubbles and low-performance nodes. The project states that it can analyze a 1-trillion-parameter MoE run on 10,000 GPUs in just a few hours.

For reinforcement learning, the stack supports the slime and miles frameworks; Megatron handles the training, and the MUSA build of SGLang generates runs, allowing one base system to serve both pre-training and RL. Optimization for autonomous inference is not within the scope of this project.

For developers considering domestic accelerators, the practical question is what part of the existing training code will remain functional. Moore Threads' answer is that the Megatron ecosystem code requires no changes.

SpacemiT did not develop its server processor V100 independently. At the RISC-V Summit in China, held in Shenzhen on October 19, the company, in collaboration with the open-source processor team XiangShan, presented three ready-made servers built around this chip. These systems are accompanied by accelerator validation and operating system support, aiming to implement RISC-V-based machines in data centers.

The three presented devices include the C2201 compute server, the G5201 AI server, and the S5236 storage server. They are designed to handle general-purpose tasks, accelerate artificial intelligence, and manage large-scale data storage. The G5201 server is equipped with eight full-size, full-length dual-width accelerator cards and supports high-speed RDMA cluster networking. SpacemiT confirms that the chip has been tested using domestic accelerators, including Kunlunxin's M100.

Furthermore, the company offers partners server motherboards, firmware, BMC management, and hardware reference designs, enabling the creation of custom-branded machines without needing to develop the board from scratch.

Significant attention has been paid to software. SpacemiT states that V100 implements five RISC-V server solution specifications in silicon, firmware, and operating system: RVA23, Server SoC, Server Platform, Boot and Runtime Services (BRS), and security model. The company reports successful completion of all BRS tests. Consequently, operating systems such as openEuler, openRuyi, openKylin, Debian, Ubuntu, Fedora, Red Hat, and Rocky Linux can be installed, booted, and run directly.

For multi-tenant cloud environments, V100 supports the RISC-V H, AIA, and IOMMU extensions, which provide hardware-level virtualization for CPU, memory, interrupts, and I/O. SpacemiT notes that these virtualization extensions already have native support in Linux, eliminating the need for a custom kernel. The chip also includes a hardware root of trust, a native RISC-V trusted execution environment, and RERI RAS support. The company promotes the concept of lightweight micro-VMs on V100 as a way to isolate AI workloads in the cloud with minimal overhead, comparable to containers.

The chip itself utilizes a hybrid architecture of 46 cores, comprising six XiangShan Kunminghu V2R2 cores and 40 SpacemiT X100 cores, operating at speeds up to 2.4 GHz. Two such chips can be coherently linked to achieve a total performance of up to 92 cores. Each chip supports eight DDR5 channels and 52 PCIe 5.0 lanes. XiangShan is overseen by the Institute of Computing Technology, Chinese Academy of Sciences.

SpacemiT positions V100 as the first universal chip fully compliant with RISC-V server solution specifications. Founder and CEO Chen Zhijian stated that this chip marks the company's transition from device development to cloud technologies. It should be noted that all stated characteristics and compliance claims originate from SpacemiT.